| 摘要 |
PURPOSE:To decrease output noise even if large noise is included in an input signal by providing at least one means using a stable noise signal in synchronizing with the input signal so as to apply frequency conversion with the 2nd PLL circuit. CONSTITUTION:Since a phase comparator 34, a low pass filter 35, and a low noise voltage controlled crystal oscillator VCXO36 constitute a PLL circuit, an output frequency f0 of the VCXO36 is synchronized with a frequency fi of an input signal Si received via a transmission line 32 from a sender 31. Thus, an output So with low noise in synchronizing correctly with the frequency fi of the sender 31 is transmitted from a reference signal generating means 30 even if large noise is included on the transmission line. A phase comparator 42, a low pass filter 43, a VCO44 and a frequency divider 45 constitute another PLL circuit. Output noise of the VOC44 of a frequency converting means 401 depends on the noise in the output So of the means 30 and the noise of frequency dividers 41, 45 and is made independent of the noise of the VCO44 at self running. |
