发明名称 SEMICONDUCTOR MEMORY CELL
摘要 PURPOSE:To improve the production yield of a memory IC using the static type memory cell by providing a level shifter so that a static memory cell is constituted of only a normaly-on type transistor and a diode only to simplify the control of a gate threshold voltage. CONSTITUTION:The signals of information lines 20 and 21 are transmitted to circuit nodes 26 and 27 when a work line 23 is set at a high level. These signals are supplied to the gate electrode of a trnasistor TR34 via a level shifter consisting of a TR37, a diode 38 and a TR32 as well as to the gate electrode of a TR31 via a level shifter consisting of a TR36, a diode 39 and a TR35. TR30 and 31 form an inverter, and the signal supplied to the gate electrode of the TR31 is inverted and amplified to appear at a node 26. The signal supplied to the node 26 appears at a node 27 after inversion and amplification. That is, the contents of a flip-flop are decided according to the signals of the lines 20 and 21 and then stored. In a read mode the lines 20 and 21 are set under a floating state and TR40 and 41 are turned on.
申请公布号 JPS6055594(A) 申请公布日期 1985.03.30
申请号 JP19830162741 申请日期 1983.09.05
申请人 NIPPON DENKI KK 发明人 TAKAHASHI KAZUKIYO
分类号 G11C11/41;G11C11/40;(IPC1-7):G11C11/40 主分类号 G11C11/41
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