| 摘要 |
PURPOSE:To reduce the parasitic resistance of the titled transistor by a method wherein the first high impurity density region is provided on a channel adjoining to the longitudinal direction of the channel and a surperlattice region, wherein the first semiconductor and the second semiconductor of low impurity density are laminated alternately, is provided at the lower part of the first high impurity density region. CONSTITUTION:An Al0.3Ga0.7As layer 2 is formed on a high resistance GaAs substrate 1, and a secondary electron layer is formed on the interface which comes in contact with the layer 2 of a high resistance substrated 1 by the help of the modulation dope effect generating from the difference in current conductivity of Al0.3Ga0.7As and GaAs. A channel layer 3 is formed by secondary electrons. The current conductivity of the channel layer 3 is controlled by the voltage applied to an Al electrode 6. A GaAs region 4 is provided adjoining to the layer 2 and 3, and a superlattice region 5 whereona non-doped AlAs layer 51 and a GaAs layer 52 are alternately laminated is formed adjoining to the region 4. An Au-Ge alloy film is formed on the surface of the region 4, and it is shaped up into a source electrode 7 and drain electrode 8 respectively. |
