发明名称 ARITHMETIC CONTROL SYSTEM
摘要 PURPOSE:To obtain a correct result with a small number of cycles by providing an input/output information switching means and a logical arithmetic control means, and switching a logical arithmetic unit to another nondefective unit when an error generated in said unit. CONSTITUTION:When an error occurs to a logical arithmetic unit ALU21, an error detecting circuit ALUCK51 for logical arithmetic unit transmits an error signal ALUERB0 to a logical arithmetic control part ALCONT1. Then the ALCONT1 executes a recovery cycle. That is, the ALCONT1 controls multiplexers MPX43, 44 and 45 and a carry CRY62 to select a terminal B and a COB1 and uses an ALU22 in place of the ALU21 to execute the operation of B0. In such a way, an arithmetic unit having an error is switched to another nondefective unit. Thus a correct result is obtained with a small number of cycles.
申请公布号 JPS6045848(A) 申请公布日期 1985.03.12
申请号 JP19830152818 申请日期 1983.08.22
申请人 FUJITSU KK 发明人 SATOU MASAO
分类号 G06F7/00;G06F7/57;G06F11/20 主分类号 G06F7/00
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