发明名称 PHASE SIGNAL-INCREMENTAL SIGNAL CONVERTER
摘要 PURPOSE:To simplify the construction by varying the phase of a comparison signal detecting the phase difference between a phase signal and the comparison signal to generate a pulse corresponding to this variation. CONSTITUTION:When the frequency of an input clock pulse is selected to be specified times as large as the frequency of the phase signal of a resolver so that the counting repetition cycle of a counter 31 may be T/2 of the cycle of the phase signal, a coincidence output is sent out sequentially from a comparator 33 delayed by time T/2 from the starting point of counting and a comparison signal with the repetition cycle T is sent to a phase comparator 40 from an FF34. Then, a phase difference is generated between comparison signals with changes in the angle theta of the rotation of a roller 4 and fed to a generator 20. The generator 20 feeds a pulse to a reversible counter 13 and with a delay in the output of a comparator 34, the phase difference with the phase signal of the comparator 40 becomes small down to zero finally.
申请公布号 JPS6038616(A) 申请公布日期 1985.02.28
申请号 JP19830146857 申请日期 1983.08.11
申请人 ONO SOTSUKI:KK 发明人 MAEHARA OSAMU;NAKAJIMA YOSHITAKA
分类号 G01D5/245;G01D5/247;G05D3/12 主分类号 G01D5/245
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