| 摘要 |
PURPOSE:To enhance precision of the relative ratios between the mutual transistors having different gate widths of an MOS integrated circuit by a method wherein transistors are combined, which transistors have gate regions formed by arranging in parallel and by connecting MOS transistors having the referential gate regions consisting of fixed gate length and the referential gate widths corresponding to the prescribed ratio of integers. CONSTITUTION:An MOS integrated circuit is containing MOS transistors of the plural number having the same gate length, and moreover having gate widths in relation of the ratio of integers. The MOS transistors of the plural number mentioned above have gate regions formed by arranging in parallel and by connecting the referential regions consisting of gate widths of one over integers corresponding to relation of the ratio of integers thereof. Namely, the gate regions 14-16 of the MOS transistors of three pieces, for example, have the same gate length, and gate widths are made to 10mum, 15mum and 25mum respectively which are in relation of the ratio of integers of 2:3:5. While, the respective gate regions are formed by making the referential gate region 21 having the referential gate width of 5mum as gate width, which is one over the integer corresponding to relation of the ratio of integers, the gate regions 14-16 are formed by arranging in parallel with the referential gate regions 21 of two pieces, three pieces and five pieces respectively holding the distances between the gate regions respectively to be connected to gate wirings 22, and respective drain currents are led out from output wirings 11-13 respectively. |
