发明名称 DIRECT MEMORY ACCESS CONTROLLING CIRCUIT
摘要 PURPOSE:To initialize easily a comparatively large memory area, and to reduce burden of software by providing a data transfer word number controlling circuit and an initial value setting circuit, on a direct memory access circuit. CONSTITUTION:A data transfer word number controlling circuit 11 provided on a direct memory access controlling circuit 10 masks upper (N-n) bits of a data transfer word number TC setting bit and delivers them to a data transfer word number latching circuit 8. That is to say, when the designated TC is <=2<n>, they are delivered to the circuit 8 by subtracting 2<n> from the TC. Also, when at least 1-bit among the upper (N-n) bits is ''1'', it is informed as an initializing request signal 13 to an initializing value setting circuit 12. That is to say, when a memory is initialized in software, the head address of the memory to be initialized is used as a data transfer start address, and a value which has added 2<n> to the number of words of the memory to be initialized is made the number of data transfer words. In this way, a comparatively large memory area is initialized, and burden of software can be reduced.
申请公布号 JPS6033651(A) 申请公布日期 1985.02.21
申请号 JP19830141697 申请日期 1983.08.02
申请人 NIPPON DENKI KK 发明人 MORI KUNIHIKO
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
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