| 摘要 |
PURPOSE:To enable to prevent an erroneous operation from occurring in an integrated circuit of an RAM by forming a P type silicon layer on an N type silicon substrate, associating an integrated circuit element with the silicon layer, and providing a substrate bias applying terminal, thereby eliminating a defect due to free carrier. CONSTITUTION:N type impurity regions 9, 10 are formed as source and drain on a silicon substrate formed with a P type layer 8 on the surface of an N type silicon substrate 7, and a gate electrode 12 is provided through a gate insulating film 11 on the surface of the substrate between both regions. A source voltage VSS, a drain voltage VDD and a gate voltage VGG are applied to the MOSFET, and driven as an N-channel MOSFET. A bias applying terminal 13 for applying 0v or negative bias voltage VBB to the layer 8 is provided on the same main surface formed with the source and drain region of the layer 8. |
