发明名称 MEMORY ACCESS CONTROL CIRCUIT
摘要 PURPOSE:To reduce the load on page changing and attain efficient access by storing information which designates one of pages where the direct address designation is possible in a memory space, and selecting one of them and designating a page on the basis of the contents. CONSTITUTION:Information for designating pages is set in respective page registers 3-A-3-J on the basis of an input/output instruction from a processor 1, which executes the 1st processing unit of processing A to obtain plural processing result data. A multiprocessor 4 selects the register 3-A on the basis of address information that the processor 1 outputs to an address bus 5, and the processing result data are stored from the 1st storage location of an area a1 designated by the contents of the register 3-A and address information from the address bus 5. Similarly, the 1st processing unit of each of processes B-J is executed successively, processing result data are stored in areas b1-j1, and then the processing advances to the 2nd processing unit of the process A. If data is stored in the last location of the area a1 during the storing operation, the remaining data are stored in an area a2.
申请公布号 JPS6027964(A) 申请公布日期 1985.02.13
申请号 JP19830137052 申请日期 1983.07.27
申请人 NIPPON DENKI KK 发明人 ISHIDA TOYONORI
分类号 G06F12/06 主分类号 G06F12/06
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