发明名称 SYSTEM FOR SETTING MEMORY ADDRESS
摘要 PURPOSE:To set freely an optional area matching to the using condition of a shared memory by a system CPU by providing an address latch means to store the address of the shared memory and providing the common area at the shared memory. CONSTITUTION:An address latch circuit 22 is provided with a local CPU 2, and stores the address of the shared memory 3. Between systems CPU 1 and CPU 2, the common memory areas are set which both can read/write the data in the memory 3. Namely, first, the CPU 1 divides the head address of the area in the memory 3 through a common bus 4 into the lower order position and the higher order position and latches it to the circuit 22. Next, through a microprocessor 21 of the CPU 2 and an AND circuit 23, the area is determined, thereby the CPU 1 divides optimally the whole of the area of the memory 3 to areas on the processing and can be used. Consequently, the CPU 1 can freely set the common area matching to the using condition of the memory 3.
申请公布号 JPS61206066(A) 申请公布日期 1986.09.12
申请号 JP19850046107 申请日期 1985.03.08
申请人 RICOH CO LTD 发明人 KAWASHIMA SHINICHIRO
分类号 G06F15/16;G06F12/00;G06F12/06;G06F13/18;G06F15/167 主分类号 G06F15/16
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