发明名称 MULTI-PATH DISTORTION REDUCTION CIRCUIT
摘要 PURPOSE:To decrease multi-path distortion by using a signal where the phase of a cancel signal is inverted as a cancellation signal when a DU ratio (level ratio of direct wave and reflected wave) is inverted. CONSTITUTION:When the DU ratio is not inverted, an output of a front end 1 is passed through a BPF7 and an AM detector 8 detects an envelope of an IF signal. Since the distortion is inverted at each half period of the fundamental wave, the cancellation signal is formed by inverting a detected output 8 at each half period. Further, the higher the modulation frequency is, the more the cancellation signal is increased. This is conducted by a differentiator 10 and a multiplier 11 having a characteristic as shown in Fig. As a result, a waveform with multi- path distortion reduced is obtained from an adder 12. When the DU ratio is inverted, the said cancellation signal is inverted. This is conducted by an inverting device 13 and an adder 14. The output changeover of the adders 12, 14 is conducted automatically by detectors 16, 17, a comparator 18, a switch driver 19 and a changeover device 15. This is conducted by utilizing the principle that much harmonics (57kHz) of a pilot signal exists when much distortion exists. That is, the comparator 18 generates a switching signal of the switch 15 depending on its input.
申请公布号 JPS6019328(A) 申请公布日期 1985.01.31
申请号 JP19830127342 申请日期 1983.07.13
申请人 PIONEER KK 发明人 OOTAKI KIYOSHI;ISHIDA KOUJI
分类号 H04B1/10;H04B1/12;H04H20/47;H04H40/72;(IPC1-7):H04B1/10 主分类号 H04B1/10
代理机构 代理人
主权项
地址