| 摘要 |
PURPOSE:To quicken a lock speed by selecting a time constant of a low pass filter at the unlock state so as to be minimized for the lock time and changing over the said time constant at the lock state so as to minimize an FM noise. CONSTITUTION:When a PLL loop is in the unlock state, a discriminating circuit 6 detects the state and controls changeover switches 7, 8 so as to connect a low pass filter 4 between a phase comparator 1 and a VCO2. The low pass filter 4 consists of a lag/lead filter where the time constant is selected so as to attain the unity of the damping coefficient, and even if the FM noise is increased, the lockup time is decreased. When the PLL loop transits to the lock state, the discriminating circuit 6 detects it, the changeover switches 7, 8 connect a low pass filter 5 having a damping coefficient of nearly 0.3 so as to decrease the FM noise and improve the performance. Thus, the lockup time is reduced without deteriorating the performance. |
