发明名称 FIXED POINT FAST FOURIER TRANSFORM SYSTEM
摘要 <p>PURPOSE:To perform a fast Fourier transform operation at high precision by providing a signal bit into each data flowing between operators to show whether a right shift is carried out with a butterfly operation and then adding the data containing the control informaton. CONSTITUTION:The input data containing the signal data of 1 bit is multiplied by the contents of an ROM6 storing a constant by a multiplier 7 and in a fixed point style. The result of this multiplication is delivered to a data register 8. The data is treated as the data excluding the signal bits for the fixed point addition of an adder 9. A controller 15 controls a switch 11. The output of the adder 9 is delivered to the register 8 and a register 12 with the intermediate result and the final result of the addition respectively. The contents of the register 12 are stored in an output data buffer 14. This information includes the presence or absence of a digit overflow as well as the shifting frequency so far.</p>
申请公布号 JPS607575(A) 申请公布日期 1985.01.16
申请号 JP19830114218 申请日期 1983.06.27
申请人 HITACHI SEISAKUSHO KK 发明人 MAEDA AKIRA;HAMANO NOBUO;HONMA KOUICHI;YAMAGATA NOBUTAKE;KUBO YUTAKA
分类号 G06F17/14;(IPC1-7):G06F15/332 主分类号 G06F17/14
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