发明名称 INTEGRATED INJECTION LOGIC CIRCUIT
摘要 PURPOSE:To prevent waveform dullness of an output waveform of a high-frequency input signal by biasing the emitter of the first transistor (TR) to a voltage which is higher than the grounded collector potential of the second TR by a value corresponding to one P-N junction forward bias voltage at least. CONSTITUTION:When a signal level inputted from an analog signal processing circuit 1 to the base of a TR Q4 exceeds a threshold voltage determined by the forward bias potential of a diode D, the TR Q4 is cut off, and the voltage of an output terminal 8 of an I<2>L semiconductor circuit device 8 becomes a saturation voltage of a TR Q2 on a basis of the anode-side potential of the diode D. When a signal level inputted from an analog signal processing circuit 2 to the base of the TR Q4 becomes lower than the threshold potential determined by the forward bias potential of the diode D, the TR Q4 is made active, and the voltage of the output terminal of the I<2>L semiconductor circuit 6 becomes the forward bias potential between the base and the emitter of a TR Q3 on a basis of the anode-side potential of the diode D.
申请公布号 JPS601923(A) 申请公布日期 1985.01.08
申请号 JP19830108659 申请日期 1983.06.17
申请人 NIPPON DENKI KK 发明人 SHINOHARA KOUJI;TOKUDA KAZUO
分类号 H03K19/091;(IPC1-7):H03K19/091 主分类号 H03K19/091
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