| 摘要 |
PURPOSE:To facilitate the alteration of priority by providing two priority determining circuits, a selecting circuit which selects the output of either one, and a switching circuit which switches the output of the selecting circuit. CONSTITUTION:When a JK-FF3 is reset with an external signal W to generate a Q output ''0'' , X=X1, and Y=Y1 regardless of the state of the JK-FF2, so that the priority determined by a priority encoder P1 is signified. Then when an FF2 is reset and the FF3 is set, X=X2, and Y=Y2, so the priority determined by a priority encoder P2 is signified. When the FFs F2 and F3 are both set, both gates G2 and G3 output ''1'', so X=X1 and Y=Y1, or X=X2 and Y=Y2 according to whether an FF1 is reset or set. The FFF1 is inverted every time request signals A and B are generated at the same time, so the priority level is changed every time contention occurs.
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