发明名称
摘要 PURPOSE:To make it possible to prevent erroneous frame synchronization of a PCM device by providing a frame synchronizing circuit and a means of detecting a multiframe synchronizing pattern of random frame phase, and then by putting them in specific operation. CONSTITUTION:The synchronizing circuit whose multiframe consists of 12 frames and which receives a primary group PCM signals, following CCITT advice G.733, having a prescribed frame synchronizing signal and multiframe pattern inserted into the initial bit of each frame is provided with a frame synchronizing circuit and a means of detecting multiframe synchronizing patterns of random frame phase. In the acquisition of synchronism, when a frame synchronizing pattern is discriminated and a multiframe synchronizing pattern is not detected, the retrieval of synchronizing bits is continued without maintaining the frame synchronism.
申请公布号 JPS5952586(B2) 申请公布日期 1984.12.20
申请号 JP19790166923 申请日期 1979.12.24
申请人 OKI DENKI KOGYO KK;NIPPON DENSHIN DENWA KOSHA 发明人 OKAMOTO SEIJI;OKANO SUKEHIDE
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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