| 摘要 |
PURPOSE:To raise a high speed property in a signal leading-in part, to reduce a current consumption required for pre-charge of a data line, and to shorten a pre- charge time by using an N channel type MOS transistor for the signal leading-in part extending from the data line to a flip-flop circuit. CONSTITUTION:A timing signal line L'3 is set to low voltage, an N channel type MOS transistor Q'5 is set to an off-state, a timing signal line L'4 is set to low voltage, P channel type MOS transistors Q'8, Q'9 and Q'10 are set to an on-state, and sense input/output lines L'6, L'7 are pre-charged to a supply power source VDD. At the same time, a timing signal line L'5 is set to high voltage, N channel type MOS transistors Q'11, Q'12 and Q'13 are set to an on-state, and data lines L'1, L'2 are pre-charged to the potential which has been lowered by a threshold voltage portion of the N channel type MOS transistor from the VDD level. In this case, N channel type MOS transistors Q'1, Q'2 operate as a level shifting element for a voltage drop, and as for the L'6, L'7, its potential is not drawn by the L'1, L'2, and they are pre-charged to the VDD level. |
