| 摘要 |
PURPOSE:To attain a test of a fault processing mechanism in a state close to an actual environment and to improve the system mechanism, by providing a fault burying task and setting an address where the generation of a fault is desired to a comparison address register. CONSTITUTION:When a fault burying task 21a is started while plural tasks are working in parallel to each other, an address where the generation of a fault is desired is set to a comparison address register 8. At the same time, an enable FF10 is set. Then a comparator 7 delivers a coincidence signal 9 when the address signals read successively to an address line 2 are coincident with the contents of the register 8. Then a fault generating signal 5 is supplied to a parity generator 4. Thus the control is carried out so as to avoid the coincidence between a parity bit 6 and a normal parity bit. If the data added with an erroneous bit 6 is supplied to a memory controller, a code error is detected. Thus the fault is processed. In such a way, a fault processing mechanism is tested in a state approximate to an actual environment. This improves the system reliability. |
