| 摘要 |
<p>A pseudo-static type RAM composed of dynamic type memory cells (M-ARY) is operated in response to the changes in external address signals (AO-A8: A9-A14). In the RAM of this type, the word lines with which the selection terminals of the memory cells (M-ARY) are connected, are selected only for such a remarkably short time period as responds to the abnormally short period for which the external address signals (AO-A8; A9-A14) are changed by ddress skews. If the selection period of the word line is short, the signal level to be rewritten in the memory cells (M-ARY) is dropped so that the stored data are substantially broken. In order to prevent this breakage of the stored data, an address buffer (R-ADB) is controlled. The reception of the external address signals (AO-A8) by the address buffer (R-ADB) is prohibited during the time period after the selection of the word line is started and before the rewritting operation of the data in the memory cells (M-ARY) is ended.</p> |
