发明名称 MOS TYPE DYNAMIC MEMORY AND MANUFACTURE THEREOF
摘要 PURPOSE:To suppress dispersion of memory capacity values, by providing a groove shaped recess part in the direction of a plate thickness along the peripheral part of the memory part in a memory region, and constituting the memory region by a substrate and a P-N junction capacitor wherein a reverse conductive type semiconductor layer is formed. CONSTITUTION:A groove shaped recess part 11 is provided in the surface of a memory forming region surrounded by an element separating insulating layer 5 on a P type silicon substrate 1 in a frame shape in the direction of a plate thickness. An N<-> layer 2 is formed on the inner wall surface of the recess part 11. A polysilicon layer is embedded in the recess part 11 and a capacitor electrode 7 is formed. A memory region, which has the side-wall groove-shaped recess structure and comprises a P-N junction with a large contact area, is constituted. In the recess part 11, which is coated by an SiN mask 13, an Si3N4 layer 14 is embedded, and a non-memory region is formed.
申请公布号 JPS59224167(A) 申请公布日期 1984.12.17
申请号 JP19830097792 申请日期 1983.06.03
申请人 HITACHI SEISAKUSHO KK 发明人 AZUMA TAKASHI
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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