Method of producing a via in a semiconductor device.

摘要

A method of producing a via in the fabrication of a semiconductor wafer is disclosed. Vias are used in semiconductor wafer fabrication as a means of providing electrical connexions between different layers of the wafer. The walls of known vias are difficult to coat reliably with metal because, particularly in the case of fabrication processes aimed at small line widths, the vias must be kept within certain size limits and necessarily have vertical walls. The method described involves the formation in a layer of dielectric material (8) of two communicating passageways. One passageway (11) has sloping walls (12) to facilitate metal coating. The other passageway (13) has substantially vertical walls (14), thus keeping the via within required dimensions at the region of the wafer to which a connexion is to be made. The two passageways (11, 13) are produced in separate process steps, a non-erodable layer (9) being used to define the via.