发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To suppress greatly a through current and to reduce sufficiently the current of a mean active mode without deteriorating the margin in the read/ write and data holding modes respectively of a static semiconductor memory. CONSTITUTION:The power supply terminals at the GND side of a memory cell 306 on the same bit line are connected in common with each other, and an impedance variable circuit 308 is connected between the GND and common junctures Sj (j=0,1-M-1). The circuit 308 is formed by connecting in parallel n channel transistors Q301-Q303 having Y decoder output Yj (j=0,1-M-1), the chip selection input buffer signal CS and VCC connected to the gate respectively. With use of such circuit 308, the through current of a non-selection bit line can be reduced sufficiently compared with the through current of a selection bit line. Thus it is possible to suppress the through current flowing to a memory cell from the bit line and therefore to reduce satisfactorily the current of a mean active mode.
申请公布号 JPS59218698(A) 申请公布日期 1984.12.08
申请号 JP19830092833 申请日期 1983.05.26
申请人 NIPPON DENKI KK 发明人 KOBAYASHI YASUO
分类号 G11C11/411;G11C11/40;G11C11/41;G11C11/417;(IPC1-7):G11C11/40 主分类号 G11C11/411
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