| 摘要 |
PURPOSE:To execute pattern equalization in a high speed by operating pattern equalizing units, which are provided for individual variables, in parallel to take out variables of required substitution and partial formulas. CONSTITUTION:Two formulas f(X,X) and f(g(0,Y), g(Z,1)) are inputted to pattern equalizing units and are stored as tree structure arrays in memories as shown by Fig. A. Data are inputted to a partial pattern taking-out device and a pattern equalizing control circuit 10 through a line 12 in the order of address. Unless constants and function symbols other than variables in two formulas are in the same addresses and are equal to each other, a pattern equalization checking de- vice 16 judges pattern equalization to be impossible and stops the operation. With respect to data (f) in address 1 in Fig. A, pattern equalization is judged to be possible in this stage, and data are inputted successively from memories to respective variable position detectors 17 through the line 12 together with address numbers. Detectors 17 takes out variables from inputted data and output variables and corresponding address numbers as pairs of signals successively. |
