| 摘要 |
PURPOSE:To obtain the high-reliability complmentary MOS integrated circuit by forming an arsenic diffusion inhibiting layer between an oxide layer and an arsenic-including layer into which hydrogen can be diffused so as to prevent diffusion of As into the oxide layer. CONSTITUTION:An Si oxide layer 1, an arsenic diffusion preventing layer 11, an arsenic silicate glass layer 2 and a plasma-CVD-type Si nitride layer 3 are laminated on a semiconductor substrate 5 and an insular region 6 to form a field insulating layer 12. For the arsenic diffusion preventing layer 11, plasma-CVD- type Si nitride, CVD Si nitride or the like in each of which a diffusion coefficient of As is small are used. When annealing the arsenic silicate glass layer 2, As is not diffused into the side of the Si oxide layer 1 by interposition of the preventing layer 11. Because an As transition layer is not formed, generation of positive charge does not occur in spite of hydrogen in the Si nitride layer 3 generated by plasma CVD. Accordingly, a surface level of the semiconductor substrate becomes stable and increase of a leakage current of variation of a threshold voltage can be prevented.
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