发明名称 CONTROL CIRCUIT FOR DOT MATRIX PRINTER
摘要 PURPOSE:To process printing data at high speed and to obtain a printing result of high quality without using a memory of large capacity, by method wherein a control circuit of a dot matrix printer is provided with three CPUs so that the role is shared to the respective CPUs to enhance the processing speed as a whole. CONSTITUTION:An F/F 41 is set according to the signal from a port P11 in a main-CPU 6 and reset according to the signal from a port P12 in a subI-CPU 8 and at the output terminal thereof connected to a port P13 in the main-CPU 6 and an INT 1, one of INT terminals in the subI-CPU 8. An F/F 42 is set according to the signal from a port P12 in the main-CPU 6 and reset according to the signal from a port P22 in the subI-CPU 8 and at the output terminal thereof connected to a port P14 in the main-CPU 6 and an INT 2, one of INT terminals in the subI-CPU 8. An F/F 43 is set according to the signal from a port P23 in the subI-CPU 8 and reset according to the signal from a port P32 in a subII-CPU 9 and at the output terminal thereof is connected to a port P31 in the subII-CPU 9.
申请公布号 JPS6213360(A) 申请公布日期 1987.01.22
申请号 JP19850152331 申请日期 1985.07.12
申请人 KANAASU DATA KK 发明人 EMURA TAKASHI
分类号 B41J2/51;G06F3/12;G06K15/10 主分类号 B41J2/51
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