| 摘要 |
PURPOSE:To decrease the ON-resistance of a P channel transistor (TR) by insulating N-channel and P-channel isolation gate TRs respectively from other TR region so as to vary a back gate potential of each TR. CONSTITUTION:The P-channel TR A and the N-channel TR B are constituted from other elements with electrical isolation by an isolation region reaching the P substrate 11. Thus, the back gate of the P-channel TR A is controlled independently of the back gate bias of TRs for other P-channel logic, the ON- resistance of the P-channel TR is decreased as same as the N-channel TR, and in case of floating, the effect of the back gate bias on the ON-resistance is mitigated in comparison with conventional effects. As a result, the area of the P- channel TR is decreased. |
