发明名称 |
DUTY CYCLE MONITOR CIRCUIT |
摘要 |
<p>TITLE DUTY CYCLE MONITOR CIRCUIT A duty cycle monitor circuit which detects variations in the duty cycle of a monitored pulse by comparing its duty cycle with the pulse width of an external reference signal. A detection circuit detects the duty cycle variation of the monitored pulse after being periodically reset by the external reference signal. A storage circuit is clocked by the reference signal and operates to store the output signals of the detection circuit. Upon detection of a duty cycle failure the monitor can be cleared by external control or detection of a monitored pulse having a valid duty cycle.</p> |
申请公布号 |
CA1176716(A) |
申请公布日期 |
1984.10.23 |
申请号 |
CA19820416999 |
申请日期 |
1982.12.03 |
申请人 |
GTE AUTOMATIC ELECTRIC INCORPORATED |
发明人 |
RINALDI, GERALD M. |
分类号 |
H03K5/156;H03K5/19;H03K5/26;(IPC1-7):H03K5/22 |
主分类号 |
H03K5/156 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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