OUTPUT BUFFER CIRCUIT OF SEMICONDUCTOR ELEMENT

摘要

PURPOSE:To attain the speed-up of an output buffer circuit by giving a reverse pulse signal to a gate of a PMOS transistor (TR) between the output and the power supply and an NMOS TR between the output and ground when an address signal is changed. CONSTITUTION:The NMOS TRQ3 conducting its output to the power supply VDD and the PMOS TRQ4 conducting its output to ground VSS are provided in parallel with an output buffer TR comprising a load TRQ1 and a drive TRQ2. A transition detector circuit TD detects the change in the address input signal so as to give a detecting signal having a prescribed pulse width to a gate of the TRQ3 and to a gate of the TRQ4 via an inverter INV1. Since the output level is brought into the intermediate level until the signal of the output buffer signal is changed after the address input signal is changed, the high speed operation is attained.