发明名称 MASK MEMORY
摘要 PURPOSE:To accelerate a mask memory and to reduce a chip area by simultaneously precharging the source and drain regions of longitudinally stacked mask ROM MOSFETs from a substrate. CONSTITUTION:A well 8 is epitaxially grown on a substrate 7 to form an electrically independent well. MOSFET T1-Tn, voltage applying electrode 9 are formed on the well 8. The well 8 and the source of the MOSFET Tn are connected to the output of an inverter 10 which inputs a clock pulse. When the clock pulse becomes ''0'', the well 8 and the source and drain electrodes of the MOSFET T1-Tn are simultaneously precharged with the P-N junctions formed of the source and drain electrodes of the MOSFET T1-Tn as forward bias. Accordingly, the precharging period is reduced to raise the operating speed, and the exclusive precharging element can be eliminated to reduce the chip area.
申请公布号 JPS59181052(A) 申请公布日期 1984.10.15
申请号 JP19830054476 申请日期 1983.03.30
申请人 NIHON DENKI AISHII MAIKON SYSTEM KK 发明人 YOSHIURA MASATAKA
分类号 G11C17/00;G11C17/18;H01L21/8246;H01L27/112;H01L29/78 主分类号 G11C17/00
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