| 摘要 |
PURPOSE:To realize the reduction in the number of entry of table without decreasing the decoding processing speed by using a white code terminating decision bit and a black code termination decision bit for a code end decision data. CONSTITUTION:A decoding table 6 is accessed by an address synthesized at an address synthesizer 2. The content of each address of the table 6 is constituted in the following. That is, when the coding is attained by the MH coding, the table consists of the white code termination decision bit WT, the black code termination decision bit BT, a run length data RL, a makeup code bit MK and a field comprising a data NA excluding the least significant bit of an address pointer to the next entry. The data NA is set to an address pointer data register 3 among data which are read by accessing the table 6 and the remaining data are applied to a decision control circuit 4.
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