发明名称 LORAN C RECEIVER
摘要 PURPOSE:To achieve the shortest-time synchronization of a Loran C signal with a synchronous pulse by detecting another Loran C signal based on time lag data previously memorized using the Loran C signal initially detected as reference. CONSTITUTION:2A represents a Loran C signal, M host station signal and S1 and S2 first and second slave station signals respectively. When the synchronous operation of the master station synchronous pulse PM is ended initially, a microprocessor takes in and memorizes time lags TD1 and TD2 to the slave station synchronous pulses PS1 and PS2 measured with a time lag measuring circuit using the master station synchronous pulse PM and subtracts the time TD1 and TD2 to calculate the time difference TA and TB. The synchronous deviation data TA and TB are sent out to a synchronous pulse generation circuit to shift the phases in the slave station synchronous pulses PS1 and PS2 in the direction of eliminating the synchronous deviation while the first and second slave station synchronous pulses PS1 and PS2 synchronize with specified positions of slave station Loran C signal respectively.
申请公布号 JPS59178377(A) 申请公布日期 1984.10.09
申请号 JP19830054722 申请日期 1983.03.29
申请人 FURUNO DENKI KK 发明人 SHIAKU YUKIHIRO
分类号 G01S5/10;G01S1/24 主分类号 G01S5/10
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