发明名称 SWEEP OSCILLATING CIRCUIT
摘要 PURPOSE:To relieve the load imposed on a CPU and the software by setting a data corresponding to the amount of frequency change and the direction of change to a resistor so as to allow a desired sweep oscillation to be executed by the hardware. CONSTITUTION:A data relating to sweep oscillation from the CPU is transmitted to register 1-4 by a data bus 11 and written in each register by a write signal 12. The data in a shift register 5 is shifted by the number of times' share set in a register by a shift number of times control section 2'. Addition or subtraction of an adder 6 is controlled depending on the content set to a register 3 by a code controlling section 3' and the addition or subtraction is performed in the timing of a switching signal from a timer 8. A counter 7 counts a clock signal 9 and when the counted value equals to an output value of the adder 6, a pulse is generated. Through the constitution above, pulse trains whose period is changed at each time Tb are outputted so as to obtain the sweep oscillation whose frequency is changed sequentially.
申请公布号 JPS59172827(A) 申请公布日期 1984.09.29
申请号 JP19830045319 申请日期 1983.03.19
申请人 RICOH KK 发明人 YAGI HIROMITSU
分类号 H03K5/156;H03K3/72;H03K23/66 主分类号 H03K5/156
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