发明名称 SIGNAL DETECTING CIRCUIT
摘要 PURPOSE:To detect a zero cross signal at intervals of peak values by generating a gate signal only when a high peak value of negative polarity is detected after a positive low peak value is detected and the order of the negative polarity and the positive polarity are replaced. CONSTITUTION:A reproducing signal is led to plural comparators 71-1-71-5 in the vertical magnetizing recording. Two slice level signals are impressed to the comparators and compared with the reproducing signal. As a result, a comparison output is obtained respectively from each comparator, and a zero cross pulse is obtained from the zero cross level detection especially. A pseudo zero cross pulse is included also in it. A Q output of a D-FF (74-1) is applied together with an output of a delay line 72-2 to an AND circuit 78, where the outputs are ANDed. Only a zero cross signal generated when the peak value is transited from a low peak value to a high peak value is detected as a true zero cross signal.
申请公布号 JPS59167812(A) 申请公布日期 1984.09.21
申请号 JP19830040736 申请日期 1983.03.14
申请人 TOSHIBA KK 发明人 TAKAGI NOBUYUKI
分类号 G11B5/09;G11B20/10;H03K5/1536;H04L7/02 主分类号 G11B5/09
代理机构 代理人
主权项
地址