发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To extract a complementary output with a smaller hysteresis characteristic and a large output amplitude by obtaining the complemntary output from collectors of the 1st and 2nd transistors (TRs) with an input from a base of the 1st TR. CONSTITUTION:TRs Q1-Q3 are provided, emitters of the TRs Q1, Q2 are connected both to a constant current source CS1, a collector of the TRQ1 is connected to a positive power supply terminal V+ via resistor R3, R1' connected in series, a collector of the TRQ2 is connected to the terminal V+ via a resistor R2, an emitter of the TRQ3 is connected to a base of the TRQ2 and a constant current source CS2, a collector is connected to the terminal V+, and a base is connected respectively to a common connecting point of the resistor R3 and R1'. Further, a base of the TRQ1 is taken as an input terminal V1, its collector is taken as an output terminal V0, and a collector of the TRQ2 is taken as an inverted output terminal V0' to the V0. Thus, the complementary output having a small hysteresis characteristic and a large output amplitude is extracted.
申请公布号 JPS59163920(A) 申请公布日期 1984.09.17
申请号 JP19830037612 申请日期 1983.03.08
申请人 NIPPON DENKI KK 发明人 KURATA KATSUMASA
分类号 H03K19/086;H03K3/2893 主分类号 H03K19/086
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