发明名称 FORMING METHOD OF WIRINGS
摘要 PURPOSE:To prevent a shortcircuit defect between metal wirings and to improve the reliability by forming upper and lower insulating layers, forming a metal layer having silicon, then forming metal wirings, removing by etching the upper layer of the insulating layer, thereby completely removing the remaining Si by etching the upper insulating layer. CONSTITUTION:A field oxidized film 2 and an element region such as a transistor region 3 are formed on a silicon substrate 1, and a gate oxidized film 4, a gate electrode 5, impurity regions 6, 6 of reverse conductive type to the substrate 1 are formed in the region 3. An insulating layer 9 having SiO2 of a lower layer 7 and nitrided silicon of an upper layer 8 is formed. Then, a resist 10 is formed on the layer 9, the nitrided silicon of the upper layer 8 of the layer 9 is etched, and contacting holes 11, 11 are then opened. After the resist 10 is removed, an aluminum layer 12 having several % of Si is formed, a resist 13 is formed in wiring shape on the layer 12, and aluminum wirings 14, 14,... are formed. At this time, the etching residues 15, 15,... of the Si contained in the layer 12 are produced on the layer 9. After the resist 13 is removed, the nitrided silicon of the layer 8 of the layer 9 is etched by plasma etching, and the residues 15, 15 of the Si on the layer 9 are completely removed.
申请公布号 JPS59152643(A) 申请公布日期 1984.08.31
申请号 JP19830026473 申请日期 1983.02.18
申请人 SANYO DENKI KK 发明人 TANASE KENJIROU
分类号 H01L21/3213;H01L21/306 主分类号 H01L21/3213
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