发明名称 INPUT CIRCUIT IN SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce power consumption at resetting by bringing an input into floating state or changing the potential to the other potential at the resetting in inputting fixed potential so as to decide the internal state. CONSTITUTION:A reset R is normally at a low level and a transistor (TR)Q7 is turned on, then an input terminal 1a of a latch circuit deciding the state of the internal circuit is at GND potential and an output of an inverter g2 goes to a low level. The output of an NOR circuit goes similarly to a high level and the latch output is made stable. When the reset R goes to a high level at resetting, the TRQ7 is turned off, resulting in that the input terminal 1a is brought into a floating state and the latch output goes high because the reset R is logical high. If the input terminal remains still at a GND level in this case, it increases power consumption by the competition with an output of the NOR circuit, but the input terminal at the resetting is brought into the floating state, resulting in that the power consumption is avoided.
申请公布号 JPS59152728(A) 申请公布日期 1984.08.31
申请号 JP19830026179 申请日期 1983.02.21
申请人 HITACHI SEISAKUSHO KK 发明人 OOI EIJI
分类号 H03K19/0175;H03K19/00 主分类号 H03K19/0175
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