发明名称 GENERATING CIRCUIT OF CARRY SIGNAL
摘要 PURPOSE:To obtain the function at a high speed for a carry look-ahead type carry signal generating circuit by cascading in three stages of a buffer circuit consisting of a Josephson junction, NOT logical circuit and a double input logical circuit. CONSTITUTION:Each output terminal 3 of buffer circuits M1-MN are connected in common to an input terminal 1 of a double input logical circuit F through NOT logical circuits S1-SN. Then a complement signal Vi-2 is supplied to an AND complement signal input terminal Zi-2 in the form of a notation number 0. At the same time, complement signals Ui-1...UN-1 are supplied to OR complement signal input terminals Yi-1...Zi-2 respectively in the form of a binary number 0. In such a case, an output showing a binary number 1 is obtained at a carry signal output terminal 21. Then an output showing a binary number 1 is obtained at the terminal 21 in case a binary number 1 is obtained among the complement signal Zi-2 supplied to the terminal Zi-2 and signals Ui-1...UN-1 supplied to terminals Yi-1...YN-1 respectively.
申请公布号 JPS59135543(A) 申请公布日期 1984.08.03
申请号 JP19830008590 申请日期 1983.01.21
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 TAKARAGAWA KOUJI;ISHIDA AKIRA
分类号 G06F7/48;G06F7/38;G06F7/50;G06F7/508;H03K19/195 主分类号 G06F7/48
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