发明名称 INSTRUCTION DECODING IN DATA PROCESSING APPARATUS
摘要 <p>DMCO-36 INSTRUCTION DECODING IN DATA PROCESSING APPARATUS By Albert J. Weidner An instruction decoding system for data processing apparatus in which alternative instruction interpretations are made possible through-hardware sensing of the operational state of one or more machine elements. In one embodiment, a zero detect unit is used to sense the state of a subroutine stack used in a microprogrammed system, therefore permitting a generic "exit" microcommand to be interpreted either as a "return" or a "decode" depending upon the state of the subroutine stack.</p>
申请公布号 CA1171969(A) 申请公布日期 1984.07.31
申请号 CA19810388743 申请日期 1981.10.26
申请人 SPERRY CORPORATION 发明人 WEIDNER, ALBERT J.
分类号 G06F9/22;G06F9/26;(IPC1-7):G06F9/22 主分类号 G06F9/22
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