| 摘要 |
PURPOSE:To perform efficient and speedy error processing by deciding a fault and displaying it when the total value of parity error detected by every parity checking circuit in the direction of an element array above by one package exceeds a specified settable value. CONSTITUTION:A row address 11 and a column address 12 are used to read one byte each out of 20 storage elements arrayed in one row in a matrix consisting of three rows and four columns of memory packages 1 (12 rows and 20 columns of storage elements 2), i.e. 20 memory data 4 in total; and they are held by a data latch 5 and a parity check on them is made by a parity checking circuit simulatneously. If a parity error is detected, a counter counts it and when the total value of errors in the element column direction of the one package exceeds an optionally set value, e.g. 100, that is regarded as a fault to perform column fault display 8 and row fault display 10, realizing easily the package 1 caused the fault. The data held by the data latch 5 are read out, byte by byte, separately and processed. |
