| 摘要 |
PURPOSE:To attain high speed read of a part of areas and to save the capacity of a frame memory depending on the size of a read area by providing a driving frequency switching circuit to a driver circuit and switching the driving frequency in response to the area. CONSTITUTION:Assuming addresses of start and end points of a prescribed read area be (X1, Y1) and (X2, Y2) respectively, then the X1, X2 and the Y1, Y2 are designated respectively by registers 4, 5; then comparators 2, 3, 7, 8 compare the designated vaues as values Xd, Yd of an address counter and when they satisfy the relation of Xd>=X1, Xd<=X2, Xd<=X2, Yd>=Y1, Yd<=Y2, an ON signal is outputted. A switching circuit 13 selects a low speed clock pulse 12 when an output of an AND circuit 14 is turned on, that is, the above equations are established, and also selects a high speed pulse 11 when the output of the circuit 14 is turned off. When the size of prescribed read area to all areas is constant, the capacity of external frame memories is reduced in response to the prescribed read area. |
