| 摘要 |
PURPOSE:To enable to simply start and stop an inverter by locking a gate pulse amplifier by a pulse. CONSTITUTION:Clocks S of 155 deg., 165 deg., 170 deg. delay from a reference gate signal, pulses U, V of 150 deg. delay, a start and stop signals are applied as input signals to a condition confirming circuit 70 and a stop clock generator 80. An NAND flip- flop 78 produces a pulse lock signal and a pulse amplifier produces a gate pulse for firing a thyristor during extinguishing in the output voltage pause period as output signals. The start and stop signals are sequentially inputted to one input terminals of a NAND gate 96 and flip-flop 72-78 through an inverter gate 94. |
