| 摘要 |
PURPOSE:To improve the processing speed of a vector data processor and to improve the efficiency of the processor by bringing an access pipeline under the multiple control of plural instructions. CONSTITUTION:The storage control part of the vector data processor 9 is provided with the access pipeline 1, a main memory control part 6, and a main memory 9. A block 8 of this control part 6 includes an address pipeline and the like for priority control over an access request to the memory 9 and timing adjustment during partial storing. Further, the pipeline 1 is provided with a vector register 2, mask register 3, aligning part 4 which converts the boundaries of plural element data, and address operation part 5 which generates the starting address of segment data and converts a logical address into a real address. Then, the pipeline 1 is brought under the multiple control of plural instructions to improve the processing speed of the processor, improving the efficiency of the device. |
