发明名称 DIGITAL SIGNAL ARITHMETIC DEVICE
摘要 PURPOSE:To realize fast, high-precision arithmetic through small-sized constitution by constituting one arithmetic device by using three LSI chips for signal arithmetic, memory address arithmetic, and input/output operation. CONSTITUTION:For example, when repetitive arithmetic is performed, the memory address arithmetic chip 1 increases the address by one every time when the arithmetic is performed once. When one instruction is executed and the memory address arithmetic is completed, the chip 11 sends a program memory-up signal to a program memory part 1 through an OR circuit gate 14 to advance a program by one. A memory part 3 reads and writes a signal by the chip 11. The arithmetic chip 12 processes the signal from the memory part 3 by an instruction from the memory 1 and stores the result in the memory part 3. Further, the input/output chip 13 performs signal input and output between the outside and memory part 3 when an input and an output instruction are read out of the memory part 1.
申请公布号 JPS59123957(A) 申请公布日期 1984.07.17
申请号 JP19820229989 申请日期 1982.12.29
申请人 NIPPON DENKI KK 发明人 HISADA MASAHIRO
分类号 G06F15/16;G06F9/32;G06F9/38;G06F15/80;G06F17/10 主分类号 G06F15/16
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