发明名称 TIME SWITCH SYSTEM USING MULTI-PORT MEMORY
摘要 PURPOSE:To increase the capacity of a time switch without increasing the necessary speed nor the memory capacity of a channel memory by writing the information delivered from an incoming highway in parallel to the channel memory and then reading said information in parallel out of the channel memory to send it to each outgoing highway. CONSTITUTION:Writing ports WP1 and WP2 write independently and in parallel the write data wd1 or wd2 delivered from an incoming highway to memory units ME1-MEn designated by a write address wa1 or wa2 via gates G1-Gn. Then read ports RP1 and RP2 read out independently the data stored in the memory units ME1-MEn designated by a read address ra1 and ra2 and deliver the read data rd1 or rd2 to an outgoing highway.
申请公布号 JPS59119996(A) 申请公布日期 1984.07.11
申请号 JP19820232632 申请日期 1982.12.25
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA 发明人 SATOU HIROAKI;MIYAHARA NORIO;NIKAIDOU TADANOBU
分类号 H04Q3/52;H04Q11/04 主分类号 H04Q3/52
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