发明名称 DIFFERENTIAL AMPLIFYING CIRCUIT
摘要 PURPOSE:To increase the gain of the differential component of an input signal and suppress the gain of an in-phase component to increase the ratio in-phase component removal greatly by adding two transistors (TRs) to a differential amplifying circuit. CONSTITUTION:This differential amplifying circuit is provided with a couple of P channel MOSTRs Q1 and Q2 whose sources are connected in common, an N channel MOSTRQ3 which feeds back the drain voltage of the TRQ2 to the common source, an N channel MOSTRQ4 which inverts and impresses the drain voltage of the TRQ2 to an output terminal, and load elements LD1 and LD2 such as resistances. When the voltage with the same logical level is impressed to respective inputs, for example, when input voltages VIA and VIB are both at a high level, the potentials at points (a) and (c) are both at a low level, and the potential at the common source of the TRs Q1 and Q2, i.e. point (b) rises by the inverting amplification of the TRQ3 which receives said low level while the potential at the point (c) also rises by the inverting amplification of the TRQ4. Therefore, a drop in output voltage VOUT is prevented to suppress the in-phase component.
申请公布号 JPS59119588(A) 申请公布日期 1984.07.10
申请号 JP19820226611 申请日期 1982.12.27
申请人 FUJITSU KK 发明人 ORITANI ATSUSHI
分类号 G11C11/419;G11C11/34;H03F3/45 主分类号 G11C11/419
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