发明名称 MOS CAPACITY DEVICE
摘要 PURPOSE:To prevent the decrease in capacity value and to perform stable circuit operation, by surrounding the peripheral part of a p type diffused layer by an n<+> type diffused layer, whose conductive type is reverse to that of the p type diffused layer. CONSTITUTION:A ring-shaped n<+> type diffused layer 7 is formed along the peripheral part of a p<+> type diffused layer 2 so as to cover the surface of an n type substrate. An Al electrode 5, which is connected to the p type diffused layer, is formed so as to short the n<+> type diffused layer. The p<+> type diffused layer can be formed by utilizing the base diffusion or the p type well diffusion in an n-p-n transistor process. The n<+> type diffused layer can be formed by utilizing the emitter diffusion in the n-p-n transistor process by the same way. In this MOS capacity device, a potential V becomes high and an inverted layer 8, which is generated on the surface of the p<+> type diffused layer, is connected to the n<+> type diffused layer 7 having the reverse conductive type. In this way, the reduction in capacity value after inversion is immediately recovered to the original state.
申请公布号 JPS59117256(A) 申请公布日期 1984.07.06
申请号 JP19820226295 申请日期 1982.12.24
申请人 HITACHI MAIKURO COMPUTER ENGINEERING KK;HITACHI SEISAKUSHO KK 发明人 YONETANI NOBUAKI
分类号 H01L27/04;H01L21/822;H01L29/94 主分类号 H01L27/04
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