发明名称 GATED PARALLEL DECODER
摘要 <p>RCA 75,990 GATED PARALLEL DECODER The decoder includes a plurality of input signal responsive transistors having their conduction paths connected in parallel between a node and a point of reference potential. These transistors, when turned-on, tend to clamp the node to the reference potential. A controllable load is connected between a second voltage and the node for providing when,enabled by an external control signal and in the absence of an internally generated inhibit signal, a conduction path to charge the node towards the second voltage. The inhibit signal, generated by an inhibit network responsive to the node voltage, inhibits conduction via the charging conduction path of the controllable load when the node voltage is at, or close to, the second voltage.</p>
申请公布号 CA1170319(A) 申请公布日期 1984.07.03
申请号 CA19820395010 申请日期 1982.01.27
申请人 RCA CORPORATION 发明人 STEWART, ROGER G.
分类号 G11C11/413;G11C11/41;H03K19/017;H03K19/0948;H03K19/096;(IPC1-7):H03K19/08 主分类号 G11C11/413
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