| 摘要 |
PURPOSE:To diagnose more precisely a defective system and to switch the defective system to a normal one by feeding back not only an answer back signal from the opposite system, but an interruption signal to be sent to the opposite system to the self-system. CONSTITUTION:A CPU part 2 loads a master/slave discriminating status from a duplicated system supervising part 3. Consequently, the master and slave systems of an arithmetic unit are determined and the arithmetic unit is controlled by the processing routine of control program for each system. In order to synchronize both systems before operational processing, the master system sends an interruption signal to the slave system. At that time, the master system checks the existence of a feedback signal returned from OR gates G1, G2 through feedback lines L3, L4. If the feedback signal is absent, system switching is performed by regarding the master system as a defective one. Receiving the interruption signal from the master system, the slave system returns the same signal to the master system as an answer back signal. The master system checks the existence of the answer back signal. If there is no answer back signal, the master system is operated individually by regarding the slave system as a defective one. |
