发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To accelerate a read-out operation by providing a high resistance which absorbs the leakage current flowing to a common data line between the earth potential of a circuit and said common data line via a switch means that is turned on at a chip non-selection mode. CONSTITUTION:A switch MOSFETQ12 which receives a control signal ce and a high resistance R which flows a current of about muA, for example, are set in series between a common data line CD1 and the earth potential of a circuit. At the same time, a witch MOSFETQ13 is provided to the bias voltage VB to limit the level increment and to flow a current of high resistance R. This resistance R consists of a polysilicone resistance, and this resistance value is set at about 1MOMEGA because the potential of the line CD1 is about 2V at most in a chip non- selection mode. Both MOSFETQ12 and 13 are turned on in a chip non-selection mode to suppress the level increment due to the leakage currnt of the voltage VB as well as the line CD1.</p>
申请公布号 JPS59104797(A) 申请公布日期 1984.06.16
申请号 JP19820213900 申请日期 1982.12.08
申请人 HITACHI SEISAKUSHO KK 发明人 FURUSAWA KAZUNORI;WAKIMOTO HARUMI
分类号 G11C16/06;G11C17/00 主分类号 G11C16/06
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