发明名称 ANALOG-DIGITAL CONVERTER
摘要 PURPOSE:To prevent noise and distortion from being generated by varying an upper limit value and a lower limit value of an A/D converter in response to the amplitude and the DC level of an input analog signal so as to attain individual control of the amplitude and the DC level. CONSTITUTION:An analog voide signal is applied to an input terminl 8, and the signal is converted into a digital video signal of one sample n-bit at the A/D converter 1 and extracted from an output terminal 9. The input video signal is applied also to an amplitude detecting circuit 10 and a pedestal detecting circuit 11 in this case, an AC gain control voltage P and a DC level control voltage Q are extracted, and an upper limit value setting value Ra and a lower limit value setting value Rb are applied to an inverting input of operational amplifiers 18, 19. The upper limit setting value and the lower limit setting value are applied to terminals A, B of the A/D converter 1 via operational amplifiers 24, 25, and 2<n> sets of resistors R are connected between the terminals A and B. A reference voltage divided by the resistors R is applied to comparison amplifiers C1-Cn, and m-set of outputs corresponding to input analog levels are generated.
申请公布号 JPS59104826(A) 申请公布日期 1984.06.16
申请号 JP19820214297 申请日期 1982.12.07
申请人 SONY KK 发明人 IWASE SEIICHIROU;KOMORI SHINICHI
分类号 H03M1/18;H03M1/06;H03M1/26 主分类号 H03M1/18
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